Serial Number
72472
Course Number
EE5141
Course Identifier
921 U9330
No Class
- 3 Credits
Elective
GRADUATE INSTITUTE OF ELECTRICAL ENGINEERING / GRADUATE INSTITUTE OF ELECTRONICS ENGINEERING / Master Program for Integrated Circuit Design and Automation / PhD Program for Integrated Circuit Design and Automation
GRADUATE INSTITUTE OF ELECTRICAL ENGINEERING
GRADUATE INSTITUTE OF ELECTRONICS ENGINEERING
Master Program for Integrated Circuit Design and Automation
PhD Program for Integrated Circuit Design and Automation
Elective- CHIA-HSIANG YANG
- View Courses Offered by Instructor
COLLEGE OF ELECTRICAL ENGINEERING AND COMPUTER SCIENCE DEPARTMENT OF ELECTRICAL ENGINEERING
chyee@ntu.edu.tw
- 電資學院 明達館 616
02-33661492
- Thu 2, 3, 4
明達205
Type 2
30 Student Quota
NTU 30
No Specialization Program
- Chinese
- NTU COOL
- Notes
NTU Enrollment Status
Enrolled0/30Other Depts0/0Remaining0Registered0- Course Description1. Basics of VLSI signal processing 2. Architectural transformation 3. Iterative and bit-level arithmetic 4. Digital filters 5. FFT 6. Time and frequency analysis 7. Wordlength optimization 8. Basics of digital circuits 9. Power reduction 10. Circuit optimization 11. Low energy implementation 12. Ultra low power design 13. Design examples
- Course Objective1. 介紹數位訊號處理架構設計的基本技巧與常用模組 2. 本課程的重點是積體電路之硬體架構設計與低功耗電路設計
- Course RequirementHomework: 30% Midterm: 30% Final project: 40%
- Expected weekly study hours after class
- Office Hour
- Designated ReadingNo textbook
- References- D. Markovic and R. W. Brodersen: DSP Architecture Design Essentials, Springer, 2012 - K. K. Parhi, VLSI Digital Signal Processing Systems: Design and Implementation, Wiley, 1999 - J. Rabaey, A. Chandrakasan, B. Nikolić, Digital Integrated Circuits: A Design Perspective, 2nd Edition, Prentice Hall 2003
- Grading
- Adjustment methods for students
- Course Schedule
Week 1 No Class (Make-up class will be provided) Week 2 Introduction, Basics of VLSI Signal Processing Week 3 Digital Filters Week 4 Iterative and Bit-Level Arithmetics Week 5 Fast Fourier Transform (FFT) Module Week 6 Basics of Digital Circuits, Power Reduction Week 7 No Class (National Holiday) Week 8 Time-Frequency Analysis Week 9 Midterm Week 10 Circuit Optimization, Low-Energy Implementations Week 11 Ultra-Low Power/Voltage Design, Wordlength Optimization Week 12 Multi-Antenna Decoders Week 13 Bioinformatics/Biosignal Processors Week 14 ML for VLSI/AI Processors Week 15 AI Processors Week 16 (Invited talk) Week 17 Final Project Presentation