NTU Course
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Vlsi Testing

Offered in 112-2
  • Serial Number

    72463

  • Course Number

    EEE5001

  • Course Identifier

    943 U0010

  • No Class

  • 3 Credits
  • Elective

    GRADUATE INSTITUTE OF ELECTRICAL ENGINEERING / GRADUATE INSTITUTE OF ELECTRONICS ENGINEERING / PhD Program for Integrated Circuit Design and Automation / Master Program for Integrated Circuit Design and Automation

      Elective
    • GRADUATE INSTITUTE OF ELECTRICAL ENGINEERING

    • GRADUATE INSTITUTE OF ELECTRONICS ENGINEERING

    • PhD Program for Integrated Circuit Design and Automation

    • Master Program for Integrated Circuit Design and Automation

  • CHIEN-MO LI
    • View Courses Offered by Instructor
    • COLLEGE OF ELECTRICAL ENGINEERING AND COMPUTER SCIENCE GRADUATE INSTITUTE OF ELECTRONICS ENGINEERING

    • cmli@ntu.edu.tw

    • 電機 二館 3 樓 339 室
    • 23635251-339

  • Tue 2, 3, 4
  • Zonghe Lecture Building Rm. 401 (綜401)

  • Type 1

  • 42 Student Quota

    NTU 42

  • No Specialization Program

  • English
  • NTU COOL
  • Core Capabilities and Curriculum Planning
  • Notes
    The course is conducted in English。
  • NTU Enrollment Status

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  • Course Description
    This course introduce basic concepts of VLSI testing. This course will cover both theoretic and practical aspects of testing techniques of VLSI circuits from EDA (electronic design automation) point of view. This is a flipped classroom where students are required to watch video at home and attend the class for discussion. This course requires students to implement a mini EDA tool, automatic test generator (ATPG). This course requires a final team project where students can put together what they learned in the class. The course focuses mainly on digital VLSI circuits.
  • Course Objective
    Students will learn important concepts of VLSI testing knowledge required for both designers and EDA engineers. Students will also learn to implement a EDA tool, automatic test generator (ATPG).
  • Course Requirement
    C++ coding ability. Logic design and VLSI design background.
  • Expected weekly study hours after class
    Watch on-line video. Study course materials at home
  • Office Hour
  • Designated Reading
    Prof. Li's Video and PPT. https://www.youtube.com/watch?v=nX0XCD0ggHs&list=PLvd8d-SyI7hjk_Ci0zpTqImAtpEjdK5JF&ab_channel=%E6%9D%8E%E5%BB%BA%E6%A8%A1
  • References
  • Grading
    27%

    Program Assignement

    30%

    Exam

    30%

    Project

    10%

    Classwork

    3%

    Participation

  • Adjustment methods for students
    Adjustment MethodDescription
    Teaching methods

    Assisted by recording

    Assisted by video

  • Course Schedule
    Week 01-16introduction, Logic Simulation, Fault Modeling, Fault Simulation, Test Generation, Diagnosis, Built-in Self Test, Test Compression, Memory testing.